1. Field
The field of the technology relates to nonvolatile memory. More specifically, the technology relates to data retention in nonvolatile memory cells despite charge leakage and other factors that cause errors in data storage such as read disturbs and margin loss.
2. Description of Related Art
Storage density in nonvolatile memory cells is increased by utilizing a multi-level threshold voltage algorithm, which typically encodes at least two bits per nonvolatile memory cell. In the case of charge trapping memory cells, nanocrystal memory cells, and other memory cells with localized charge structures, each localized charge portion encodes at least two bits per cell in a multi-level threshold voltage algorithm.
However, such multi-level threshold voltage algorithms require many distinct threshold voltage states. For example, a 2-bit scheme requires four threshold voltage states, a 3-bit scheme requires eight threshold voltage states, an so on. To squeeze this many threshold voltage states within the permitted range of threshold voltages of the nonvolatile memory cell, the margin between neighboring threshold voltage states may be narrowed as a result of bunching distinct threshold voltage states closer together. However, such a threshold voltage algorithm is more vulnerable to data errors due to charge leakage, margin loss, and disturbs.
FIG. 1 shows an example threshold voltage design algorithm for a nonvolatile memory cell. FIG. 1 shows: the 0.8 V initial distribution of a low threshold voltage state 110, the 0.4 V cycling margin 120, the room temperature and read disturb 0.15 V 130, the 0.7 V final threshold voltage window 140, the 0.7 V charge loss margin 150, and the 0.7 V distribution of a high threshold voltage state 160. The table below shows the threshold voltages corresponding to different points along the voltage axis.
Margin Mode 15 μATarget Device 1 μA Vth1113.05V1.90V1153.45V2.3V1253.85V2.7V1354.0V2.85V1454.7V3.55V1555.4V4.25V1656.1V4.95V
Therefore, it would be desirable to bunch together distinct threshold voltage states more closely together, without increasing the risk of data storage errors from confusing neighboring threshold voltage states.